图书介绍
The 80×86 IBM PC and Compatible Computers Volumes 1&2 Assembly Language,Design,and Interfacing Fourt【2025|PDF|Epub|mobi|kindle电子书版本百度云盘下载】

- Muhammad Ali Mazidi 著
- 出版社: 清华大学出版社
- ISBN:7302078858
- 出版时间:2004
- 标注页数:984页
- 文件大小:52MB
- 文件页数:1016页
- 主题词:微型计算机-高等学校-教材-英文;汇编语言-程序设计-高等学校:技术学校-教材-英文;微型计算机-接口-高等学校-教材-英文
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图书目录
CHAPTER 0:INTRODUCTION TO COMPUTING1
SECTION 0.1:NUMBERING AND CODING SYSTEMS2
Decimal and binary number systems2
Converting from decimal to binary2
Converting from binary to decimal2
Hexadecimal system3
Converting between binary and hex4
Converting from decimal to hex4
Converting from hex to decimal4
Counting in base10,2,and166
Addition of binary d hex numbers6
2's complement6
Addition and subtraction of hex numbers7
Addition of hex numbers7
Subtraction of hex numbers7
ASCII code8
SECTION 0.2:INSIDE THE COMPUTER9
Some important terminology9
Internal organization of computers9
More about the data bus10
More about the address bus10
CPU and its relation to RAM and ROMI IInside CPUs11
Internal working of computers12
SECTION 0.3:BRIEF HISTORY OF THE CPU13
CISC vs.RISC14
CHAPTER 1:THE 80x86 MICROPROCESSOR18
SECTION 1.1:BRIEF HISTORY OF THE 80x86 FAMILY19
Evolution from 8080/8085 to 808619
Evolution from 8086 to 808819
Success of the 808819
Other microprocessors:the 80286,80386,and 8048619
SECTION 1.2:INSIDE THE 8088/808621
Pipelining21
Registers22
SECTION 1.3:INTRODUCTION TO ASSEMBLY PROGRAMMING23
Assembly language programming24
MOV instruction24
ADD instruction25
SECTION 1.4:INTRODUCTION TO PROGRAM SEGMENTS26
Origin and definition of the segment27
Logical address and physical address27
Code segment27
Logical address vs.physical address in the code segment28
Data segment29
Logical address and physical address in the data segment30
Little endian convention31
Extra segment(ES)32
Memory map of the IBM PC32
More about RAM32
Video RAM33
More about ROM33
Function of BIOS ROM33
SECTION 1.5:MORE ABOUT SEGMENTS IN THE 80x8633
What is a stack,and why is it needed?33
How stacks are accessed34
Pushing onto the stack34
Popping the stack34
Logical address vs.physical address for the stack35
A few more words about segments in the 80x8636
Overlapping36
Flag register37
Bits of the flag register38
Flag register and ADD instruction38
Use of the zero flag for looping40
SECTION 1.6:80x86 ADDRESSING MODES41
Register addressing mode41
Immediate addressing mode41
Direct addressing mode42
Register indirect addressing mode42
Based relative addressing mode43
Indexed relative addressing mode43
Based indexed addressing mode44
Segment overrides44
CHAPTER 2:ASSEMBLY LANGUAGE PROGRAMMING49
SECTION 2.1:DIRECTIVES AND A SAMPLE PROGRAM50
Segments of a program50
Stack segment definition51
Data segment definition51
Code segment definition52
SECTION 2.2:ASSEMBLE,LINK,AND RUN A PROGRAM54
asm and.objfiles55
Ist file55
PAGE and TITLE directives56
crf file56
LINKing the program57
map file57
SECTION 2.3:MORE SAMPLE PROGRAMS57
Analysis of Program 2-158
Various approaches to Program 2-160
Analysis of Program 2-262
Analysis of Program 2-362
Stack segment definition revisited62
SECTION 2.4:CONTROL TRANSFER INSTRUCTIONS64
FAR and NEAR64
Conditional jumps64
Short jumps64
Unconditional jumps66
CALL statements66
Assembly language subroutines67
Rules for names in Assembly language67
SECTION 2.5:DATA TYPES AND DATA DEFINITION69
80x86 data types69
Assembler data directives69
ORG(origin)69
DB(define byte)69
DUP(duplicate)70
DW(define word)70
EQU(equate)71
DD(define doubleword)71
DQ(define quadword)72
DT(define ten bytes)72
SECTION 2.6:SIMPLIFIED SEGMENT DEFINITION73
Memory model74
Segment definition74
SECTION 2.7:EXE VS.COM FILES76
Why COM files?76
Converting from EXE to COM77
CHAPTER 3:ARITHMETIC AND LOGIC INSTRUCTIONS AND PROGRAMS82
SECTION 3.1:UNSIGNED ADDITION AND SUBTRACTION83
Addition of unsigned numbers83
CASE 1:Addition of individual byte and word data83
Analysis of Program 3-1a84
CASE 2:Addition of multiword numbers85
Analysis of Program 3-286
Subtraction of unsigned numbers87
SBB(subtract with borrow)88
SECTION 3.2:UNSIGNED MULTIPLICATION AND DIVISION88
Multiplication of unsigned numbers88
Division of unsigned numbers90
SECTION 3.3:LOGIC INSTRUCTIONS AND SAMPLE PROGRAMS93
AND93
OR93
XOR94
SHIFT95
COMPARE of unsigned numbers96
IBM BIOS method of converting from lowercase to uppercase99
BIOS examples of logic instructions100
SECTION 3.4 BCD AND ASCⅡ OPERANDS AND INSTRUCTIONS101
BCD number system101
Unpacked BCD102
Packed BCD102
ASCII numbers102
ASCII to BCD conversion102
ASCII to unpacked BCD conversion102
ASCII to packed BCD conversion103
Packed BCD to ASCII conversion104
BCD addition and subtraction104
BCD addition and correction104
DAA105
Summary of DAA action105
BCD subtraction and correction105
Summary of DAS action107
ASCII addition and subtraction109
Unpacked BCD multiplication and division110
AAM110
AAD110
SECTION 3.5:ROTATE INSTRUCTIONS111
Rotating the bits of an operand right and left111
ROR rotate right111
ROL rotate left112
RCR rotate right through carry113
RCL rotate left through carry113
SECTION 3.6:BITWISE OPERATION IN THE C LANGUAGE114
Bitwise operators in C114
Bitwise shift operators in C115
Packed BCD-to-ASCII conversion in C116
Testing bits in C116
CHAPTER 4:BIOS AND DOS PROGRAMMING IN ASSEMBLY AND C121
SECTION 4.1:BIOS INT I 0H PROGRAMMING122
Monitor screen in text mode122
Clearing the screen using INT IOH function 06H123
INT IOH function 02:setting the cursor to a specific location123
INT IOH function 03:get current cursor position124
Changing the video mode124
Attribute byte in monochrome monitors125
Attribute byte in CGA text mode125
Graphics:pixel resolution and color127
INT IOH and pixel programming128
Drawing horizontal or vertical lines in graphics mode128
Changing the background color129
SECTION 4.2:DOS INTERRUPT 21H130
INT 21H option09:outputting a string to the monitor130
INT 21H option02:outputting a character to the monitor130
INT 21H option01:inputting a character,with echo130
INT 21H option 0AH:inputting a string from the keyboard131
Inputting more than the butter size132
Use of carriage return and line feed134
INT 21H option07:keyboard input without echo135
Using the LABEL directive to define a string buffer136
SECTION 4.3:INT 16H KEYBOARD PROGRAMMING139
Checking a key press139
Which key is pressed?139
SECTION 4.4:INTERRUPT PROGRAMMING WITH C141
Programming BIOS interrupts with C/C++141
Programming INT 21H DOS functions calls with C/C++143
Accessing segment registers144
Accessing the carry ag in int86 and intdos functions144
Mixing C with Assembly and checking ZF145
C function kbhit vs.INT 16H keyboard input146
CHAPTER 5:MACROS AND THE MOUSE150
SECTION 5.1:WHAT IS A MACRO AND HOW IS IT USED?151
MACRO definition151
Comments in a macro152
Analysis of Program 5-1154
LOCAL directive and its use in macros155
INCLUDE directive158
SECTION 5.2:MOUSE PROGRAMMING WITH INT 33H161
INT 33H161
Detecting the presence of a mouse161
Some mouse terminology162
Displaying and hiding the mouse cursor162
Video resolution vs. mouse resolution in text mode163
Video resolution vs. mouse resolution in graphics mode163
Getting the current mouse cursor position(AX=03)163
Setting the mouse pointer position(AX=04)166
Getting mouse button press information(AX=05)166
Monitoring and displaying the button press count program167
Getting mouse button release information(AX=06)168
Setting horizontal boundary for mouse pointer(AX=07)168
Setting vertical boundary for mouse pointer(AX=08)168
Setting an exclusion area for the mouse pointer(AX=10)169
Getting mouse driver information(version)(AX=24H)169
CHAPTER 6:SIGNED NUMBERS,STRINGS,AND TABLES173
SECTION 6.1:SIGNED NUMBER ARITHMETIC OPERATIONS174
Concept of signed numbers in computers174
Signed byte operands174
Positive numbers174
Negative numbers174
Word-sized signed numbers175
Overflow problem in signed number operations176
When the overflow flag is set in 8-bit operations176
Overflow flag in 16-bit operations177
Avoiding erroneous results in signed number operations178
IDIV(Signed number division)179
IMUL(Signed number multiplication)180
Arithmetic shift182
SAR(shift arithmetic right)182
SAL(shift arithmetic left)and SHL(shift left)182
Signed number comparison182
SECTION 6.2:STRING AND TABLE OPERATIONS184
Use of SI and Dl, DS and ES in string instructions185
Byte and word operands in string instructions185
DF, the direction flag185
REP prefix186
STOS and LODS instructions186
Testing memory using STOSB and LODSB187
The REPZ and REPNZ prefixes187
SCAS (scan string)189
Replacing the scanned character189
XLAT instruction and look-up tables190
Code conversion using XLAT190
CHAPTER 7:MODULES; MODULAR AND C PROGRAMMING193
SECTION 7.1:WRITING AND LINKING MODULES194
Why modules?194
Writing modules194
EXTRN directive194
PUBLIC directive194
END directive in modules195
Linking modules together into one executable unit196
SEGMENT directive198
Complete stack segment definition198
Complete data and code segment definitions198
Analysis of Program 7-2 link map200
Modular programming and the new segment definition201
SECTION 7.2:SOME VERY USEFUL MODULES203
Binary(hex)-to-ASCII conversion203
ASCII(decimal)-to-binary(hex)conversion204
Binary-to-ASCII module205
ASCII-to-binary module207
Calling module207
SECTION 7.3:PASSING PARAMETERS AMONG MODULES208
Passing parameters via registers208
Passing parameters via memory208
Passing parameters via the stack208
SECTION 7.4:COMBINING ASSEMBLY LANGUAGE AND C210
Why C?210
Inseeting 80x86 assembly code into C programs211
C programs that call Assembly procedures212
C calling convention213
How parameters are returned to C214
New assemblers and linking with C215
Passing array addresses from C to the stack216
Linking assembly language routines with C217
CHAPTER 8:32-BIT PROGRAMMING FOR 386 AND 486 MACHINES220
SECTION 8.1:80386/80486 MACHINES IN REAL MODE221
General registers are pointers in 386/486222
386/486 maximum memory range in real mode:1M224
Accessing 32-bit registers with commonly used assemblers224
Little endian revisited226
SECTION 8.2:SOME SIMPLE 386/486 PROGRAMS226
Adding 16-bit words using 32-bit registers226
Adding multiword data in 386/486 machines228
Multiplying a 32-bit operand by a 16-bit operand229
32-bit by 16-bit multiplication using 8086/286 registers229
SECTION 8.3: 80x86 PERFORMANCE COMPARISON231
Running an 8086 program across the 80x86 family231
CHAPTER 9:8088, 80286 MICROPROCESSORS AND ISA BUS235
SECTION 9.1:8088 MICROPROCESSOR236
Microprocessor buses236
Data bus in 8088236
Address bus in 8088238
8088 control bus238
Bus timing of 8088239
Other 8088 pins240
SECTION 9.2:8284 AND 8288 SUPPORTING CHIPS242
8288 bus controller242
Input signals242
Output signals243
8284 clock generator244
Input pins244
Output signals245
SECTION 9.3:8-BIT SECTION OF ISA BUS246
A bit of bus history246
Local bus vs. system bus247
Address bus247
Data bus248
Control bus249
One bus,two masters249
AEN signal generation249
Control of the bus by DMA250
Bus boosting250
8-bit section of the ISA bus250
SECTION 9.4:80286 MICROPROCESSOR251
Pin descriptions252
SECTION 9.5:16-BIT ISA BUS255
Exploring ISA bus signals255
Address bus256
Data bus256
Memory and I/O control signals256
Other control signals258
ODD and EVEN bytes and BHE259
A20 gate and the case of high memory area(HMA)260
CHAPTER 10:MEMORY AND MEMORY INTERFACING265
SECTION 10.1:SEMICONDUCTOR MEMORY FUNDAMENTALS266
Memory capacity266
Memory organization266
Speed267
ROM(read-only memory)267
PROM(programmable ROM)or OTP ROM268
EPROM(erasable programmable ROM)268
EEPROM(electrically erasable programmable ROM)269
Flash memory270
Mask ROM271
RAM(random access memory)271
SRAM(static RAM)271
DRAM(dynamic RAM)273
Packaging issue in DRAM273
DRAM,SRAM and ROM organizations275
NV-RAM(nonvolatile RAM)276
SECTION 10.2:MEMORY ADDRESS DECODING276
Simple logic gate as address decoder278
Using the 74LS138 as decoder279
SECTION 10.3:IBM PC MEMORY MAP280
Conventional memory:640K of RAM281
BIOS data area282
Video display RAM(VDR)map282
ROM address and cold boot on the PC283
SECTION 10.4:DATA INTEGRITY IN RAM AND ROM284
Checksum byte284
Checksum program286
Use of parity bit in DRAM error detection286
DRAM memory banks286
Parity bit generator/checker in the IBM PC288
745280 parity bit generator and checker288
SECTION 10.5:16-BIT MEMORY INTERFACING289
ODD and EVEN banks289
Memory cycle time and inserting wait states291
Accessing EVEN and ODD words292
Bus bandwidth293
SECTION 10.6:ISA BUS MEMORY INTERFACING295
Address bus signals295
Memory control signals295
ISA bus timing for memory299
8-bit memory timing for ISA bus299
ROM duplicate and x86 PC memory map301
Shadow RAM302
DIMM and SIMM memory modules302
CHAPTER 11:I/O AND THE 8255;ISA BUS INTERFACING309
SECTION 11.1:8088 INPUT/OUTPUT INSTRUCTIONS310
8-bit data ports310
How to use I/O instructions311
SECTION 11.2:I/O ADDRESS DECODING AND DESIGN312
Using the 74LS373 in an output port design312
IN port design using the 74LS244312
Memort map I/O314
SECTION 11.3:I/O ADDRESS MAP OF X86 PCS316
Absolute vs.linear select address decoding316
Prototype addresses 300-31 FH in the x86 PC316
Use of simple logic gates as address decoders316
Use of 74LS 138 as decoder318
IBM PC I/O address decoder318
Use of the 8255 in the IBM PC/XT341
Port 61 H and time delay generation319
SECTION 11.4:8255 PPI CHIP320
Mode selection of the 8255A321
SECTION 11.5:PC INTERFACE TRAINER AND BUS EXTENDER325
PC I/O Bus Extender325
Buffering 300-31F address range326
Installing the PC Bus Extender and booting the PC327
Failure to boot327
PC Interface Trainer327
Design of the PC Trainer328
The role of H1 and H2328
Connecting the Module Trainer to the PC and testing328
Testing the 8255 port329
Testing Port A330
SECTION 11.6:I/O PROGRAMMING WITH C/C++ AND VB332
Visual C/C++ I/O programming332
Visual C++ output example332
Visual C++ input example332
I/O programming in Turbo C/C++334
I/O programming in Linux C/C++335
Linux C/C++ program with I/O functions335
SECTION 11.7:8-BIT AND 16-BIT I/O TIMING IN ISA BUS338
8-bit and 16-bit I/O in ISA bus338
I/O signals of the ISA bus339
8-bit timing and operation in ISA bus341
16-bit I/O operation and timing in ISA bus342
16-bit data ports instruction342
16-bit I/O timing and operation via ISA bus342
I/O bus bandwidth for ISA343
Interfacing 8-bit peripherals to a 16-bit data bus344
CHAPTER 12:INTERFACING TO THE PC:LCD,MOTOR,ADC,AND SENSOR351
SECTION 12.1:INTERFACING AN LCD TO THE PC352
LCD operation352
LCD pin descriptions352
Sending commands to LCDs353
Sending data to the LCD355
Checking LCD busy flag356
LCD cursor position357
LCD programming in Visual C/C++358
LCD timing and data sheet358
SECTION 12.2:INTERFACING A STEPPER MOTOR TO A PC362
Stepper motors362
Step angle363
Stepper motor connection and programming364
Steps per second and RPM relation365
The four-step sequence and number of teeth on rotor365
Motor speed366
Holding torque366
Wave drive 4-step sequence367
SECTION 12.3:INTERFACING DAC TO A PC368
Digital-to-analog(DAC)converter368
MC 1408 DAC (or DAC 808)369
Converting IOUT to voltage in 1408 DAC369
Generating a sine wave369
SECTION 12.4:INTERFACING ADC AND SENSORS TO THE PC373
ADC devices373
ADC 804 chip373
Selecting an input channel376
ADC0848 connection to8255377
Interfacing a temperature sensor to a PC378
LM34 and LM35 temperature sensors378
Signal conditioning and interfacing the LM35 to a PC379
CHAPTER 13:8253/54 TIMER AND MUSIC386
SECTION 13.1:8253/54 TIMER DESCRIPTION AND INITIALIZATION387
Initialization of the 8253/54388
Control word388
SECTION 13.2:IBM PC 8253/54 TIMER CONNECTIONS AND PROGRAMMING391
Using counter 0392
Using counter 1393
Using counter 2393
Use of timer 2 by the speaker394
Turning on the speaker via PB0 and PB1 of port 61H394
Time delay for 80x86 PCs394
Creating time delays in 8088/86-based computers395
Time delays in 80x86 IBM PC for 286 and higher processors395
SECTION 13.3:GENERATING MUSIC ON THE IBM PC397
Playing“Happy Birthday”on the PC399
SECTION 13.4:SHAPE of 8253/54 OUTPUTS401
OUT0 pulse shape in IBM BIOS401
OUT1 pulse shape in IBM BIOS402
OUT2 pulse shape in IBM BIOS402
8253/54 modes of operation402
Testing the 8255/54 timer of the PC Interface Trainer407
CHAPTER 14:INTERRUPTS AND THE 8259 CHIP410
SECTION 14.1:8088/86 INTERRUPTS411
Interrupt service routine(ISR)411
Difference between INT and CALL instructions412
Categories of interrupts413
Hardware interrupts413
Software interrupts413
Interrupts and the flag register414
Processing interrupts414
Functions associated with INT 00 to INT 04415
SECTION 14.2:IBM PC AND DOS ASSIGNMENT OF INTERRUPTS417
Examining the interrupt vector table of your PC417
Analyzing an IBM BIOS interrupt service routine419
INT 12H:checking the size of RAM on the IBM PC419
SECTION 14.3:8259 PROGRAMMABLE INTERRUPT CONTROLLER420
8259 control words and ports421
Masking and prioritization of IR0-IR7 interrupts426
OCW(operation command word)426
OCWI(operation command word1)427
OCW2(operation command word2)427
Importance of the EOI(end of interrupt)command429
OCW3(operation command word3)429
SECTION 14.4:USE OF THE 8259 CHIP IN THE IBM PC/XT430
Interfacing the 8259 to the 8088 in IBM PC/XT computers430
Initialization words of the 8259 in the IBM PC/XT431
Sequences of hardware interrupts with the8259432
Sources of hardware interrupts in the IBM PC/XT433
Sources of NMI in the IBM PC433
SECTION 14.5:INTERRUPTS ON 80286 AND HIGHER 80x86 PCs436
IBM PC AT hardware interrupts436
8259 in master mode436
8259 in slave mode437
AT-type computers interrupt assignment438
Case of missing IRQs on the AT expansion slot438
80x86 microprocessor generated interrupts(exceptions)439
Interrupt priority441
More about edge-and level-triggered interrupts441
Interrupt sharing in the x86 PC442
CHAPTER 15:DIRECT MEMORY ACCESSING; THE 8237 DMA CHIP447
SECTION 15.1:CONCEPT OF DMA448
SECTION 15.2:8237 DMA CHIP PROGRAMMING450
8237's internal control registers453
Command register453
Status register454
Mode register456
Single mask register457
All mask register457
Master clear/temporary gister458
Clear mask register459
SECTION 15.3:8237 DMA INTERFACING IN THE IBM PC/XT459
8237 and 8088 connections in the IBM PC459
Channel assignment of the 8237 in the IBM PC/XT463
DMA page register463
DMA data transfer rate of the PC/X464
SECTION 15.4:REFRESHING DRAM USING CHANNEL 0 OF THE 8237465
Refreshing DRAM with the 8237467
Refreshing in the IBM PC/XT467
DMA cycle of channel 0467
SECTION 15.5:DMA IN 80x86-BASED PC AT-TYPE COMPUTERS468
8237 DMA #1468
8237 DMA #2469
Points to be noted regarding 16-bit DMA channels470
DMA channel priority471
I/O cycle recovery time471
DMA transfer rate472
CHAPTER 16:VIDEO AND VIDEO ADAPTERS477
SECTION 16.1:PRINCIPLES OF MONITORS AND VIDEO ADAPTERS478
How to judge a monitor478
Dot pitch480
Dot pitch and monitor size480
Phosphorous materials480
Color monitors481
Analog and digital monitors481
Video display RAM and video controller481
Character box482
SECTION 16.2:VIDEO ADAPTERS AND TEXT MODE PROGRAMMING484
CGA (color graphics adapter)484
Video RAM in CGA484
Attribute byte in CGA text mode485
MDA(monochrome display adapter)486
Video RAM in MDA486
Attribute byte in IBM MDA487
EGA(enhanced graphics adapter)487
EGA video memory and attribute487
MCGA(multicolor graphics array)488
VGA(video graphics array)489
Video memory and attributes in VGA489
Super VGA(SVGA) and other video adapters491
SECTION 16.3:TEXT MODE PROGRAMMING USING MT lOH491
Finding the current video mode491
Changing the video mode491
Setting the cursor position(AH=02)493
Getting the current cursor position(AH=03)493
Scrolling the window up to clear the screen(AH=06)493
Writing a character in teletype mode(AH=OE)494
Writing a string in teletype mode(AH=13H)495
Character generator ROM495
How characters are displayed in text mode497
Character definition table in VGA498
Changing the cursor shape using INT l0H498
SECTION 16.4:GRAPHICS AND GRAPHICS PROGRAMMING501
Graphics:pixel resolution,color,and video memory501
The case of CGA501
The case of EGA502
Video memory size and color relation for EGA502
The case of VGA502
Video memory size and color relation for VGA503
The case of SVGA graphics503
INT l 0H and pixel programming504
Drawing horizontal or vertical lines in graphics mode504
CHAPTER 17: SERIAL DATA COMMUNICATION AND THE 16450/8250/51 CHIPS508
SECTION 17.1: BASICS OF SERIAL COMMUNICATION509
Half- and full-duplex transmission510
Asynchronous serial communication and data framing511
Start and stop bits511
Data transfer rate512
RS232 and other serial I/O standards513
RS232 pins513
Other serial I/O interface standards514
Data communication classification514
Examining the RS232 handshaking signals514
SECTION 17.2:ACCESSING IBM PC COM PORTS USING DOS AND BIOS516
IBM PC COM ports516
Using the DOS MODE command517
Data COM programming using BIOS INT 14H520
SECTION 17.3:INTERFACING THE NS8250/16450 UART INTHE IBM PC522
8250 pin descriptions522
The 8250 registers524
Limitation of the 8250/16450 UART and 16550530
SECTION 17.4:INTEL 8251 USART AND SYNCHRONOUS COMMUNICATION531
Intel's 8251 USART chip531
Synchronous serial data communication531
SDLC(serial data link control)535
Cyclic redundancy checks535
CHAPTER 18:KEYBOARD AND PRINTER INTERFACING541
SECTION 18.1:INTERFACING THE KEYBOARD TO THE CPU542
Scanning and identifying the key542
Grounding rows and reading the columns543
SECTION 18.2:PC KEYBOARD INTERFACING AND PROGRAMMING546
Make and break546
IBM PC scan codes546
BIOS INT 16H keyboard programming549
Hardware INT 09 role in the IBM PC keyboard551
Keyboard overrun552
Keyboard buffer in BIOS data area552
BIOS keyboard buffer553
Tail pointer553
Head pointer553
PC keyboard technology553
SECTION 18.3:PRINTER AND PRINTER INTERFACING IN THE IBM PC554
Centronics printer interface pins554
Data lines and grounds556
Printer status signals556
Printer control signals556
IBM PC printer interfacing557
Programming the IBM PC printer with BIOS INT 17H559
What is printer time-out?560
ASCII control characters560
Inner working of BIOS INT 17H for printing a character561
SECTION 18.4:BIDIRECTIONAL DATA BUS IN PARALLEL PORTS562
SPP562
PS/2562
How to detect a PS/2-type bidirectional data bus563
EPP563
ECP563
Using an LPT port for output564
LCD connection to the parallel port564
Stepper motor connection to the parallel port564
Data input buffering566
BIOS data area and LPT I/O address566
CHAPTER 19:FLOPPY DISKS,HARD DISKS,AND FILES570
SECTION 19.1:FLOPPY DISK ORGANIZATION571
Capacity of the floppy disk572
Formatting disks572
Disk organization572
Looking into the boot record573
Directory577
Bootable and nonbootable disks579
FAT(file allocation table)580
How to calculate sector locations of the FAT and the directory582
SECTION 19.2:HARD DISKS583
Hard disk capacity and organization583
Partitioning585
Hard disk layout585
Hard disk boot record585
Hard disk FAT585
Clusters585
Hard disk directory585
Speed of the hard disk585
Data encoding techniques in the hard disk586
Interfacing standards in the hard disk588
Interleaving591
Low-and high-level formatting592
Parking the head592
Disk caching592
Disk reliability592
SECTION 19.3:DISK FILE PROGRAMMING593
File handle and error code593
CHAPTER 20:THE 80x87 MATH COPROCESSOR600
SECTION 20.1:MATH COPROCESSOR AND IEEE FLOATING-POINT STANDARDS601
IEEE floating point standard601
IEEE single-precision floating-point numbers602
IEEE double-precision floating-point numbers602
Other data formats of the 8087604
SECTION 20.2:80x87 INSTRUCTIONS AND PROGRAMMING605
Assembling and running 80x87 programs on the IBM PC605
Verifying the Solution for Examples 20-1to20-4605
80x87 registers607
Trig functions612
Integer numbers614
SECTION 20.3:8087 HARDWARE CONNECTIONS IN THE IBM PC/XT616
8087 and 8088 connection in the IBM PC/XT616
How the 8088 and 8087 work together in the IBM PC/XT618
SECTION 20.4:80x87 INSTRUCTIONS AND TIMING620
Real transfers620
Integer transfers621
Packed decimal transfers621
Addition621
Subtraction621
Reversed subtraction622
Multiplication622
Division622
Reversed division622
Other arithmetic instructions622
Compare instructions623
Transcendental instructions623
Constant instructions624
Processor control instructions625
CHAPTER 21:386 MICROPROCESSOR: REAL vs. PROTECTED MODE631
SECTION 21.1:80386 IN REAL MODE632
What happened to the 80186/188?632
80186/88 instructions632
80286 Microprocessor634
Major changes in the 80386634
80386 Real mode programming635
32-bit registers635
Which end goes first?636
General registers as pointers636
Scaled index addressing mode637
Some new 386 instructions639
MOVSX and MOVZX instructions639
Bit scan instructions640
SECTION 21.2:80386:A HARDWARE VIEW641
Overview of pin functions of the 80386642
Bus bandwidth in the 386645
Data misalignment in the 386646
I/O address space in the 386646
SECTION 21.3:80386 PROTECTED MODE647
Protection mechanism in the 386647
Virtual memory647
Segmentation and descriptor table648
Local and global descriptor tables651
64 Terabtyes of virtual memory651
Paging652
Going from a linear address to a physical address653
The bigger the TLB, the better654
Virtual 8086 mode654
CHAPTER 22:HIGH-SPEED MEMORY INTERFACING AND CACHE659
SECTION 22.1:MEMORY CYCLE TIME OF THE 80X86660
Introducing wait states into the memory cycle660
SECTION 22.2:PAGE,STATIC COLUMN,AND NIBBLE MODE DRAMS662
Memory access time vs.memory cycle time662
Types of DRAM662
DRAM(standard mode)663
DRAM interfacing using the interleaving method663
Interleaved drawback665
Page mode DRAM667
Static column mode669
Nibble mode669
Timing comparison of DRAM modes671
SECTION 22.3:CACHE MEMORY672
Cache organization673
Fully associative cache673
Direct-mapped cache674
Set associative676
Updating main memory678
Write-through678
Write-back(copy-back)678
Cache coherency679
Cache replacement policy679
Cache fill block size679
SECTION 22.4:EDO, SDRAM, AND RAMBUS MEMORIES680
EDO DRAM:origin and operation680
SDRAM(synchronous DRAM)682
Synchronous DRAM and burst mode682
SDRAM and interleaving683
Rambus DRAM683
Overview of Rambus technology683
Rambus protocol for block transfer684
CHAPTER 23:486,PENTIUM,PENTIUM PRO AND MMX690
SECTION 23.1:THE 80486 MICROPROCESSOR691
Enhancements of the 486691
CLK in the 80486694
High memory area(HMA)and the 80486695
386,486 Performance comparison695
More about pipelining695
SECTION 23.2:INTEL'S PENTIUM697
Features of the Pentium699
Intel's overdrive technology703
SECTION 23.3:RISC ARCHITECTURE704
Features of RISC704
Comparison of sample program for RISC and CISC707
IBM/Motorola RISC709
SECTION 23.4:PENTIUM PRO PROCESSOR710
PentiumPro:internal architecture710
Pentium Pro is both superpipelined and superscalar711
What is out-of-order execution?711
Branch prediction714
Bus frequency vs.internal frequency in Pentium Pro714
SECTION 23.5:MMX TECHNOLOGY715
DSP and multimedia715
Register aliasing by MMX715
Data types in MMX716
SECTION 23.6:PROCESSOR IDENTIFICATION IN INTEL X 86717
Program to identify the CPU717
CPUID instruction and MMX technology718
CHAPTER 24:MS DOS STRUCTURE,TSR,AND DEVICE DRIVERS724
SECTION 24.1:MS DOS STRUCTURE725
DOS genealogy725
From cold boot to DOS prompt725
DOS standard device names728
More about CONFIG.SYS and how it is used728
What is AUTOEXEC.BAT and how is it used?729
Types of DOS commands730
SECTION 24.2:TSR AND DEVICE DRIVERS731
Executing but not abandoning the program731
How to make a program resident731
Invoking the TSR732
Hooking into hardware interrupts732
Replacing the CS:IP values in the interrupt vector table732
Writing a simple TSR732
TSR with hot keys734
Hooking into timer clock INT 08735
DOS is not reentrant736
Device drivers736
Device driver categories737
CHAPTER 25:MS DOS MEMORY MANAGEMENT740
SECTION 25.1:80x86 PC MEMORY TERMINOLOGY AND CONCEPTS741
Conventional memory741
Upper memory area741
IBM standard using ROM space in the upper memory area742
Expanded memory743
Extended memory746
High memory area(HMA)746
Shadow RAM748
DOS MEM command748
SECTION 25.2:DOS MEMORY MANAGEMENT AND LOADING HIGH749
Loading high into HMA749
Finding holes in the upper memory area750
EMM386.EXE options and switches751
Loading high TSR and device driver into upper memory area754
Emulating expanded memory and using UMB in 386/486/Pentium PC755
How expanded memory is accessed756
CHAPTER 26:IC TECHNOLOGY AND SYSTEM DESIGN CONSIDERATIONS759
SECTION 26.1:OVERVIEW OF IC TECHNOLOGY760
MOS vs.bipolar transistors760
Overview of logic families761
The case of inverters761
CMOS inverter762
Input,output characteristics of some logic families762
History of logic families763
Recent advances in logic families764
Evolution of IC technology in Inters 80x86 microprocessors765
SECTION 26.2:IC INTERFACING AND SYSTEM DESIGN CONSIDERATIONS766
IC fan-out766
Capacitance derating768
Power dissipation considerations770
Dynamic and static currents771
Power-down option and Intel's SL series771
Ground bounce771
Filtering the transient currents using decoupling capacitors774
Bulk decoupling capacitor774
Crosstalk774
Transmission line ringing775
SECTION 26.3:DATA INTEGRITY AND ERROR DETECTION IN DRAM776
Soft error and hard error776
Mean time between failure(MTBF) and FIT for DRAM777
Error detection and correction778
ECL and gallium arsenide(GaAs) chips780
CHAPTER 27:ISA,EISA,MCA,LOCAL,AND PCI BUS784
SECTION 27.1:ISA,EISA,AND IBM MICRO CHANNEL785
Master and slave785
Bus arbitration785
Bus protocol785
Bus bandwidth786
ISA buses786
36-pin part of the ISA bus789
Limitations of the ISA bus791
IBM Micro Channel Architecture(MCA)793
Major characteristics of MCA794
EISA bus795
EISA slot numbering797
Bus performance comparison798
SECTION 27.2:VL BUS AND PCI LOCAL BUSES799
Definition and merits of local bus799
VL bus(VESA local bus)characteristics801
PCI local bus801
PCI local bus characteristics801
Plug and play feature804
PCI connector804
PCI performance804
CHAPTER 28:PROGRAMMING DOS,BIOS,HARDWARE WITH C/C++808
SECTION 28.1:BIOS&DOS INTERRUPT PROGRAMMING WITH C809
Programming BIOS interrupts with C/C++809
Finding the conventional memory size with INT 12H811
INT 16H and keyboard access812
Programming INT 21H DOS function calls with C/C++812
Accessing segment registers812
Accessing the carry flag in int86 and intdos functions814
SECTION 28.2: PROGRAMMING PC HARDWARE WITH C/C++815
Accessing 80x86 SEGMENT:OFFSET memory addresses815
Accessing BIOS data area with C815
Programming input/output ports with C/C++816
Revisiting playing music816
Accessing parallel printer's(LPTI) data bus with C816
Finding memory above 1MB:the extended memory size819
Programming the CMOS RAM real-time clock(RTC)820
Accessing the CMOS RAM bytes820
Programming CMOS RAM with C/C++822
APPENDIXA:DEBUG PROGRAMMING825
APPENDIXB:80x86 INSTRUCTIONS AND TIMING847
APPENDIXC:ASSEMBLER DIRECTIVES AND NAMING RULES883
APPENDIXD:DOS INTERRUPT 21H AND 33H LISTING898
APPENDIXE:BIOS INTERRUPTS924
APPENDIXF:ASCII CODES940
APPENDIXG:I/O ADDRESS MAPS941
APPENDIXH:IBM PC/PS BIOS DATA AREA952
APPENDIXI:DATA SHEETS959
REFERENCES967
INDEX969
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